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Chapter 6: Board Test System
Using the Board Test System
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HSMA x4 Tranceivers [0..3]
HSMA x4 Tranceivers [4..7]
HSMB x4 Tranceivers [0..3]
HSMB x2 Tranceivers [4..5]
HSMA x17 LVDS SERDES
HSMB x17 LVDS SERDES
HSMA x3 Single Ended Loopback
HSMB x3 Single Ended Loopback
6–15
Data Type
The Data type control specifies the type of data contained in the transactions. The
following data types are available for analysis:
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PRBS —Selects pseudo-random bit sequences.
Memory —Selects a generic data pattern stored in the on chip memory of the
Stratix IV GX device.
Math —Selects data generated from a simple math function within the FPGA
fabric.
Error Control
The Error control controls track transaction errors detected during analysis.
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Detected errors —Displays the number of transaction errors detected in the
hardware.
Inserted errors —Displays the number of errors inserted into the transaction
stream.
Insert Error —Inserts a one-word error into the transaction stream each time you
click the button. Insert Error is only enabled during transaction performance
analysis.
Clear —Resets the Detected errors and Inserted errors counters to zeros.
Start
The Start control initiates HSMC transaction performance analysis.
Stop
The Stop control terminates transaction performance analysis.
Performance Indicators
These controls display current transaction performance analysis information collected
since you last clicked Start :
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TX and RX performance bars—Show the percentage of maximum data rate that
the requested transactions are able to achieve.
Tx (MBps) and Rx (MBps) —Show the number of bytes of data analyzed per
second.
? November 2009
Altera Corporation
Audio Video Development Kit, Stratix IV GX Edition User Guide
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